ELF designer FPGA firmware designer
| Branche | Zie onder |
| Dienstverband | Zie onder |
| Uren | Zie onder |
| Locatie | Veldhoven |
| Salarisindicaties | 60.000-70.000 |
| Opleidingsniveau | Zie onder |
| Organisatie | Yacht |
| Contactpersoon | Zie onder |
Informatie
The sector Development & Engineering (D&E) of ASML is responsible for the specification, design and realization of the products in the ASML portfolio. Within the sector D&E the cluster Electronic Development (EDEV) is responsible for the definition, realization, qualification and integration of electronic functions and modules within these products.
The FPGA Designer reports to the Group Manager Electronics EUV or delegated Team Leader.
Functieomschrijving
Introduction
Are you challenged by the FPGA Firmware embedded in high-tech products? And do you have excellent communication skills, combined with a high level of discipline, combined with design experience of FPGA FW systems? We might be looking for you!
Job Mission
As an FPGA Firmware Designer you are defining, realizing, qualifying, managing and maintaining FPGA Firmware designs that belong to various board designs for both existing and new ASML products. Furthermore you contribute on defining the next generation of these products in close cooperation with the electronics designers.
Functie-eisen
Job Description
The FPGA Designer is responsible for the following:
- Participate as an FPGA Firmware designer in a multidisciplinary design team.
- Define and document requirements for the FPGA Firmware designs.
- Perform trade-off studies to determine the preferred implementation scenario for new or changed functions.
- Define, document and execute tests to ensure that the firmware satisfies the requirements.
- Solve IP-block related problems and manage problem resolution during first system integration.
- Contribute to analysis and solution of reliability issues.
Arbeidsvoorwaarden
Primary employment conditions
- A monthly salary up to €5300
- A 13th month payment, pro-rated periodically
- 8.33% holiday allowance calculated on 12 monthly salaries
Secondary employment conditions
- Pension Plus scheme (build-up from day 1)
- 5% ADV allowance
- Net €750,- to set up your home workplace
- 25 vacation days per year based on 40 hours
- Travel allowance
- Internet allowance
- Home working allowance
Omschrijving
The sector Development & Engineering (D&E) of ASML is responsible for the specification, design and realization of the products in the ASML portfolio. Within the sector D&E the cluster Electronic Development (EDEV) is responsible for the definition, realization, qualification and integration of electronic functions and modules within these products.
The FPGA Designer reports to the Group Manager Electronics EUV or delegated Team Leader.
Functieomschrijving
Introduction
Are you challenged by the FPGA Firmware embedded in high-tech products? And do you have excellent communication skills, combined with a high level of discipline, combined with design experience of FPGA FW systems? We might be looking for you!
Job Mission
As an FPGA Firmware Designer you are defining, realizing, qualifying, managing and maintaining FPGA Firmware designs that belong to various board designs for both existing and new ASML products. Furthermore you contribute on defining the next generation of these products in close cooperation with the electronics designers.
Functie-eisen
Job Description
The FPGA Designer is responsible for the following:
- Participate as an FPGA Firmware designer in a multidisciplinary design team.
- Define and document requirements for the FPGA Firmware designs.
- Perform trade-off studies to determine the preferred implementation scenario for new or changed functions.
- Define, document and execute tests to ensure that the firmware satisfies the requirements.
- Solve IP-block related problems and manage problem resolution during first system integration.
- Contribute to analysis and solution of reliability issues.
Arbeidsvoorwaarden
Primary employment conditions
- A monthly salary up to €5300
- A 13th month payment, pro-rated periodically
- 8.33% holiday allowance calculated on 12 monthly salaries
Secondary employment conditions
- Pension Plus scheme (build-up from day 1)
- 5% ADV allowance
- Net €750,- to set up your home workplace
- 25 vacation days per year based on 40 hours
- Travel allowance
- Internet allowance
- Home working allowance
